3.4 ARCHITECTURE AND BUSES

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All of the components are tied together by computer buses.

There are a number of separate buses in a computer,

Address Bus,

- carries locations from the CPU, so that the proper RAM, ROM, and I/O locations may be addressed

- This is often 16 bits, but newer computers have moved to 32 an 64 bits.

- The size of this bus limits immediately available memory.

Data Bus,

- Carries data to and from the CPU and RAM, ROM, and I/O devices.

- The size of this bus makes the difference when specifying whether the CPU is 8 bit, 16 bit, 32 bit, or 64 bit.

- A wider data bus allows the CPU to run faster, but the hardware is more complex

Control Bus,

- Runs between all devices, and is used to direct reads, writes, data ready, address ready, interrupts, and a number of other signals.

The bus structure of a computer may be as below,

3.4.1 Clock Speed and the Buses

Clock speed determined how often the CPU will process instructions

Each instruction will use a variable number of clock cycles. For example a get from memory will take longer than a binary or operation.

Different CPU's may use anywhere from 5 to a fraction of a clock cycle to process an instruction

The bus speeds are limited by

- the physical layout of the board,

- memory speed

- CPU speed (which is related to clock speed)

Each instruction for the CPU is made up of a variable number of bytes. These are loaded from memory during execution. In an 8 bit bus these are loaded 1 at a time. To speed this up wider buses are used. For example a 64 bit bus could probably load up to 8 instructions at one. This allows instructions to be stored and processed faster, and overcome the bus speed limitations of computers.

Other Computers use a trick called caching to speed the computer. This uses a shorter bus to local memory which may be run at higher speeds, thus reducing the slower access to distant memory.