## PROCESS SEQUENCE BITSA typical machine will use a sequence of repetitive steps that can be clearly identified. Ladder logic can be written that follows this sequence. The steps for this design method are; 2. Write the steps of operation in sequence and give each step a number. 3. For each step assign a bit. 4. Write the ladder logic to turn the bits on/off as the process moves through its states. 5. Write the ladder logic to perform machine functions for each step. 6. If the process is repetitive, have the last step go back to the first. Consider the example of a flag raising controller in Figure 9.2 A Process Sequence Bit Design Example and Figure 9.3 A Process Sequence Bit Design Example (continued). The problem begins with a written description of the process. This is then turned into a set of numbered steps. Each of the numbered steps is then converted to ladder logic. Figure 9.2 A Process Sequence Bit Design Example Figure 9.3 A Process Sequence Bit Design Example (continued) The previous method uses latched bits, but the use of latches is sometimes discouraged. A more common method of implementation, without latches, is shown in Figure 9.4 Process Sequence Bits Without Latches. Figure 9.4 Process Sequence Bits Without Latches Similar methods are explored in further detail in the book Cascading Logic (Kirckof, 2003). [an error occurred while processing this directive] |