15.2.1 Branching and Looping[an error occurred while processing this directive]
These functions allow parts of ladder logic programs to be included or excluded from each program scan. These functions are similar to functions in other programming languages such as C, C++, Java, Pascal, etc.
Entire sections of programs can be bypassed using the JMP instruction in Figure 15.10 A JMP Instruction. If A is true the program will jump over the next three lines to the line with the LBL Label_01. If A is false the JMP statement will be ignored, and the program scan will continue normally. If A is false X will have the same value as B, and Y can be turned on by C and off by D. If A is true then X and Y will keep their previous values, unlike the MCR statement. Any instructions that follow the LBL statement will not be affected by the JMP so Z will always be equal to E. If a jump statement is true the program will run faster.
Subroutines jump to other programs, as is shown in Figure 15.11 Subroutines. When A is true the JSR function will jump to the subroutine program in file 3. The JSR instruction two arguments are passed, A and B. The subroutine (SBR) function receives these two arguments and puts them in X and Y. When B is true the subroutine will end and return to program file 2 where it was called (Note: a subroutine can have multiple returns). The RET function returns the value Z to the calling program where it is put in location C. By passing arguments (instead of having the subroutine use global memory locations) the subroutine can be used for more than one operation. For example, a subroutine could be given an angle in degrees and return a value in radians. A subroutine can be called more than once in a program, but if not called, it will be ignored.
The ’FOR’ function in Figure 15.12 A For-Next Loop will (within the same logic scan) call a subroutine 5 times (from 0 to 9 in steps of 2) when A is true. In this example the subroutine contains an ADD function that will add 1 to the value of i. So when this ’FOR’ statement is complete the value of j will 5 larger. For-next loops can be put inside other for-next loops, this is called nesting. If A was false the program not call the subroutine. When A is true, all 5 loops will be completed in a single program scan. If B is true the NXT statement will return to the FOR instruction, and stop looping, even if the loop is not complete. Care must be used for this instruction so that the ladder logic does not get caught in an infinite, or long loop - if this happens the PLC will experience a fault and halt.
Ladder logic programs always have an end statement, as shown in Figure 15.13 End Statements. Most modern software automatically inserts this. PLCs will experience faults if this is not present. The temporary end (TND) statement will skip the remaining portion of a program. If C is true then the program will end, and the next line with D and Y will be ignored. If C is false then the TND will have no effect and Y will be equal to D.
The one shot contact in Figure 15.14 One Shot Instruction can be used to turn on a ladder run for a single scan. When A has a positive edge the oneshot will turn on the run for a single scan. Bit last_bit_value is used here to track to rung status.
15.2.2 Fault Handling[an error occurred while processing this directive]
A fault condition can stop a PLC. If the PLC is controlling a dangerous process this could lead to significant damage to personnel and equipment. There are two types of faults that occur; terminal (major) and warnings (minor). A minor fault will normally set an error bit, but not stop the PLC. A major failure will normally stop the PLC, but an interrupt can be used to run a program that can reset the fault bit in memory and continue operation (or shut down safely). Not all major faults are recoverable. A complete list of these faults is available in PLC processor manuals.
The PLC can be set up to run a program when a fault occurs, such as a divide by zero. These routines are program files under ’Control Fault Handler’. These routines will be called when a fault occurs. Values are set in status memory to indicate the source of the faults.
Figure 15.15 A Fault Recovery Program shows two example programs. The default program ’MainProgram’ will generate a fault, and the interrupt program called ’Recover’ will detect the fault and fix it. When A is true a compute function will interpret the expression, using indirect addressing. If B becomes true then the value in n will become negative. If A becomes true after this then the expression will become n +10. The negative value for the address will cause a fault, and program file ’Recover’ will be run.
In the fault program the fault values are read with an GSV function and the fault code is checked. In this case the error will result in a status error of 0x2104. When this is the case the n is set back to zero, and the fault code in fault_data is cleared. This value is then written back to the status memory using an SSV function. If the fault was not cleared the PLC would enter a fault state and stop (the fault light on the front of the PLC will turn on).
15.2.3 Interrupts[an error occurred while processing this directive]
Allen Bradley allows interrupts, but they are called periodic/event tasks. By default the main program is defined as a ’continuous’ task, meaning that it runs as often as possible, typically 10-100 times per second. Only one continuos task is allowed. A ’periodic’ task can be created that has a given update time. ’Event’ tasks can be triggered by a variety of actions, including input changes, tag changes, EVENT instructions, and servo control changes.
A timed interrupt will run a program at regular intervals. To set a timed interrupt the program in file number should be put in S2:31. The program will be run every S2:30 times 1 milliseconds. In Figure 15.16 Disabling Interrupts program 2 will set up an interrupt that will run program 3 every 5 seconds. Program 3 will add the value of I:000 to N7:10. This type of timed interrupt is very useful when controlling processes where a constant time interval is important. The timed interrupts are enabled by setting bit S2:2/1 in PLC-5s.
When activated, interrupt routines will stop the PLC, and the ladder logic is interpreted immediately. If multiple interrupts occur at the same time the ones with the higher priority will occur first. If the PLC is in the middle of a program scan when interrupted this can cause problems. To overcome this a program can disable interrupts temporarily using the UID and UIE functions. Figure 15.16 Disabling Interrupts shows an example where the interrupts are disabled for a FAL instruction. Only the ladder logic between the UID and UIE will be disabled, the first line of ladder logic could be interrupted. This would be important if an interrupt routine could change a value between n and n. For example, an interrupt could occur while the FAL instruction was at n=n+5. The interrupt could change the values of n and n, and then end. The FAL instruction would then complete the calculations. But, the results would be based on the old value for n and the new value for n.