15.1.1 Shift Registers

[an error occurred while processing this directive]

Shift registers are oriented to single data bits. A shift register can only hold so many bits, so when a new bit is put in, one must be removed. An example of a shift register is given in Figure 15.1 Shift Register Functions. The shift register is the word ’example’, and it is 5 bits long. When A becomes true the bits all shift right to the least significant bit. When they shift a new bit is needed, and it is taken from new_bit. The bit that is shifted out, on the right hand side, is moved to the control word UL (unload) bit c.UL. This function will not complete in a single ladder logic scan, so the control word c is used. The function is edge triggered, so A would have to turn on 5 more times before the bit just loaded from new_bit would emerge to the unload bit. When A has a positive edge the 5 bits in example will be shifted in memory. In this case it is taking the value of bit example.0 and putting it in the control word bit c.UL. It then shifts the bits once to the right, example.0 = example.1 then example.1 = example.2 then example.2 = example.3 then example.3 = example.4. Then the input bit is put into the most significant bit example.4 = new_bit. The bits in the shift register would be shifted to the left with the BSR function.


Figure 15.1 Shift Register Functions

There are other types of shift registers not implemented in the ControlLogix processors. These are shown in Figure 15.2 Shift Register Variations. The primary difference is that the arithmetic shifts will put a zero into the shift register, instead of allowing an arbitrary bit. The rotate functions shift bits around in an endless circle. These functions can also be implemented using the BSR and BSL instructions when needed.


Figure 15.2 Shift Register Variations

15.1.2 Stacks

[an error occurred while processing this directive]

Stacks store integer words in a two ended buffer. There are two basic types of stacks; first-on-first-out (FIFO) and last-in-first-out (LIFO). As words are pushed on the stack it gets larger, when words are pulled off it gets smaller. When you retrieve a word from a LIFO stack you get the word that is the entry end of the stack. But, when you get a word from a FIFO stack you get the word from the exit end of the stack (it has also been there the longest). A useful analogy is a pile of work on your desk. As new work arrives you drop it on the top of the stack. If your stack is LIFO, you pick your next job from the top of the pile. If your stack is FIFO, you pick your work from the bottom of the pile. Stacks are very helpful when dealing with practical situations such as buffers in production lines. If the buffer is only a delay then a FIFO stack will keep the data in order. If product is buffered by piling it up then a LIFO stack works better, as shown in Figure 15.3 Buffers and Stack Types. In a FIFO stack the parts pass through an entry gate, but are stopped by the exit gate. In the LIFO stack the parts enter the stack and lower the plate, when more parts are needed the plate is raised. In this arrangement the order of the parts in the stack will be reversed.


Figure 15.3 Buffers and Stack Types

The ladder logic functions are FFL to load the stack, and FFU to unload it. The example in Figure 15.4 FIFO Stack Instructions shows two instructions to load and unload a FIFO stack. The first time this FFL is activated (edge triggered) it will grab the word (16 bits) from the input card word_in and store them on the stack, at stack[0]. The next value would be stored at stack[1], and so on until the stack length is reached at stack[4]. When the FFU is activated the word at stack[0] will be moved to the output card word_out. The values on the stack will be shifted up so that the value previously in stack[1] moves to stack[0], stack[2] moves to stack[1], etc. If the stack is full or empty, an a load or unload occurs the error bit will be set c.ER.


Figure 15.4 FIFO Stack Instructions

The LIFO stack commands are shown in Figure 15.5 LIFO Stack Commands. As values are loaded on the stack the will be added sequentially stack[0], stack[1], stack[2], stack[3] then stack[4]. When values are unloaded they will be taken from the last loaded position, so if the stack is full the value of stack[4] will be removed first.


Figure 15.5 LIFO Stack Commands

15.1.3 Sequencers

[an error occurred while processing this directive]

A mechanical music box is a simple example of a sequencer. As the drum in the music box turns it has small pins that will sound different notes. The song sequence is fixed, and it always follows the same pattern. Traffic light controllers are now controlled with electronics, but previously they used sequencers that were based on a rotating drum with cams that would open and close relay terminals. One of these cams is shown in Figure 15.6 A Single Cam in a Drum Sequencer. The cam rotates slowly, and the surfaces under the contacts will rise and fall to open and close contacts. For a traffic light controllers the speed of rotation would set the total cycle time for the traffic lights. Each cam will control one light, and by adjusting the circumferential length of rises and drops the on and off times can be adjusted.


Figure 15.6 A Single Cam in a Drum Sequencer

A PLC sequencer uses a list of words in memory. It recalls the words one at a time and moves the words to another memory location or to outputs. When the end of the list is reached the sequencer will return to the first word and the process begins again. A sequencer is shown in Figure 15.7 The Basic Sequencer Instruction. The SQO instruction will retrieve words from bit memory starting at sequence[0]. The length is 4 so the end of the list will be at sequence[0]+4 or sequence[4] (the total length of ’sequence’ is actually 5). The sequencer is edge triggered, and each time A becomes true the retrieve a word from the list and move it to output_lights. When the sequencer reaches the end of the list the sequencer will return to the second position in the list sequence[1]. The first item in the list is sequence[0], and it will only be sent to the output if the SQO instruction is active on the first scan of the PLC, otherwise the first word sent to the output is sequence[1]. The mask value is 000Fh, or 0000000000001111b so only the four least significant bits will be transferred to the output, the other output bits will not be changed. The other instructions allow words to be added or removed from the sequencer list.


Figure 15.7 The Basic Sequencer Instruction

An example of a sequencer is given in Figure 15.8 A Sequencer For Traffic Light Control for traffic light control. The light patterns are stored in memory (entered manually by the programmer). These are then moved out to the output card as the function is activated. The mask (003Fh = 0000000000111111b) is used so that only the 6 least significant bits are changed.


Figure 15.8 A Sequencer For Traffic Light Control

Figure 15.9 Sequencer Instruction Examples shows examples of the other sequencer functions. When A goes from false to true, the SQL function will move to the next position in the sequencer list, for example sequence_rem[1], and load a value from input_word. If A then remains true the value in sequence_rem[1] will be overwritten each scan. When the end of the sequencer list is encountered, the position will reset to 1.

The sequencer input (SQI) function will compare values in the sequence list to the source compare_word while B is true. If the two values match match_output will stay on while B remains true. The mask value is 0005h or 0000000000000101b, so only the first and third bits will be compared. This instruction does not automatically change the position, so logic is shown that will increment the position every scan while C is true.


Figure 15.9 Sequencer Instruction Examples

These instructions are well suited to processes with a single flow of execution, such as traffic lights.

[an error occurred while processing this directive]